.\" Generated by scdoc 1.11.3 .\" Complete documentation for this program is not available as a GNU info page .ie \n(.g .ds Aq \(aq .el .ds Aq ' .nh .ad l .\" Begin generated content: .TH "SYD-ASM" "1" "2025-02-22" .PP .SH NAME .PP syd-asm - disassemble raw CPU instructions from standard input .PP .SH SYNOPSIS .PP \fBsyd-asm\fR \fI[-h]\fR \fI[-a arch]\fR .PP \fBsyd-asm\fR \fI[-h]\fR \fI-a list\fR .PP .SH DESCRIPTION .PP \fBsyd-asm\fR reads CPU instructions as raw bytes or hexadecimal encoded from standard input and disassembles them.\& The disassembled instructions are printed in JSON format as one instruction per-line.\& The disassembly is done natively for architectures \fBx86\fR, \fBx86_64\fR, \fBx32\fR, \fBarm\fR, \fBaarch64\fR, and \fBriscv64\fR and falls back to GNU \fIobjdump\fR(1) for other architectures.\& There'\&s no support for LLVM \fIobjdump\fR(1) yet.\& .PP .SH OPTIONS .PP .TS l lx l lx l lx. T{ \fB-h\fR T} T{ Display help.\& T} T{ \fB-a\fR T} T{ Specify alternative architecture, such as \fBx86\fR, \fBx86_64\fR and \fBaarch64\fR.\& T} T{ T} T{ Use \fBlist\fR to print the list of libseccomp supported architectures.\& T} .TE .sp 1 .SH SEE ALSO .PP \fIsyd\fR(1), \fIsyd\fR(2), \fIsyd\fR(5), \fIsyd\fR(7), \fIobjdump\fR(1) .PP \fBsyd\fR homepage: https://sydbox.\&exherbolinux.\&org/ .PP .SH AUTHORS .PP Maintained by Ali Polatel.\& Up-to-date sources can be found at https://gitlab.\&exherbo.\&org/sydbox/sydbox.\&git and bugs/patches can be submitted to https://gitlab.\&exherbo.\&org/groups/sydbox/-/issues.\& Discuss in #sydbox on Libera Chat.\&