.\" Automatically generated by Pandoc 3.1.10
.\"
.TH "mlx5dv_reg_dmabuf_mr" "3" "" "" ""
.SH NAME
mlx5dv_reg_dmabuf_mr \- Register a dma\-buf based memory region (MR)
.SH SYNOPSIS
.IP
.EX
#include <infiniband/mlx5dv.h>

struct ibv_mr *mlx5dv_reg_dmabuf_mr(struct ibv_pd *pd, uint64_t offset,
                                    size_t length, uint64_t iova, int fd,
                                    int access, int mlx5_access)
.EE
.SH DESCRIPTION
Register a dma\-buf based memory region (MR), it follows the
functionality of \f[I]ibv_reg_dmabuf_mr()\f[R] with the ability to
supply specific mlx5 access flags.
.SH ARGUMENTS
.TP
\f[I]pd\f[R]
The associated protection domain.
.TP
\f[I]offset\f[R]
The offset of the dma\-buf where the MR starts.
.TP
\f[I]length\f[R]
.IP
.EX
The length of the MR.
.EE
.TP
\f[I]iova\f[R]
Specifies the virtual base address of the MR when accessed through a
lkey or rkey.
It must have the same page offset as \f[I]offset\f[R] and be aligned
with the system page size.
.TP
\f[I]fd\f[R]
The file descriptor that the dma\-buf is identified by.
.TP
\f[I]access\f[R]
The desired memory protection attributes; it is either 0 or the bitwise
OR of one or more of \f[I]enum ibv_access_flags\f[R].
.TP
\f[I]mlx5_access\f[R]
A specific device access flags, it is either 0 or the below.
.RS
.PP
\f[I]MLX5DV_REG_DMABUF_ACCESS_DATA_DIRECT\f[R] if set, this MR will be
accessed through the Data Direct engine bonded with that RDMA device.
.RE
.SH RETURN VALUE
Upon success returns a pointer to the registered MR, or NULL if the
request fails, in that case the value of errno indicates the failure
reason.
.SH SEE ALSO
\f[I]ibv_reg_dmabuf_mr(3)\f[R],
\f[I]mlx5dv_get_data_direct_sysfs_path(3)\f[R]
.SH AUTHOR
Yishai Hadas \c
.MT yishaih@nvidia.com
.ME \c